The manufacturing of semiconductor devices involves highly complex process flows with multiple process tool sets and some form of Quality Control. A typical analog CMOS (complementary metal–oxide–semiconductor) manufacturing process flow can have over 300 sequential process steps to produce a 180nm transistor gate technology device.
There can be four major dry etch workcells: Silicon, Nitride, Oxide and Metal. Plasma or dry etch processing of silicon wafers involves creating a plasma of reactant gas products in a reduced pressure process module. Device features are etched by highly reactive gas species arriving at high energies incident to the wafer surface.
Etch process module parameters, such as forward and reflected power, pressure, gas flows, etc., monitor the “health” of the chamber and etch process during wafer processing. Metal etch processing is a major manufacturing activity in semiconductor production.
Metal interconnects or wiring connect the transistor gates to the bond pads and the outside world. Metal interconnects are etched with Cl2 and BCL3 process gas at a chamber pressure of 10mT (ambient atmospheric pressure is 760T).
Typical process times are on the order of 30 second for main etch and 35 second over-etch to completely etch all aluminum – copper interconnect in minimum space design features. There are over one hundred different metal etch process recipes in a qualified production system.
Control of high volume manufacturing processes is challenging due in part to high volumes of process data being generated by the process tools and second party process monitoring systems. For example, a best-of breed 200mm wafer metal etch tool can control and monitor simultaneous processing in four etch process modules.
A set of parameters are monitored and recorded every second of process time. In a Metal Etch Workcell, there are on the order of 24,000 weekly moves or in plain English, 24,000 wafers processed per week in a total of 12 etch process chambers.
With the shear number of process modules in “twenty four – seven” production, some process modules will deteriorate and result in abnormal processing conditions. Examples of deterioration include degraded O-rings, electrical switch failures and chamber leaks. Semiconductor process tools have the ability to abort the process based on rather simplistic soft and hard tolerance fault values.
The process recipe defines a tolerance window for normal process conditions. Soft and hard tolerances are generally ± five and ± ten percent the recipe value, respectively. A soft warning will generate a warning in the tool history log.
A hard tolerance violation will abort the process and potentially scrap the wafer for incomplete processing. Both these options give little warning and options for a process engineer owner. Tool history log can be inadvertently cleared by maintenance staff during routine activities.
A hard tolerance abort can result in immediate scrap production and decreased production availability until the root causes are identified and corrected on the process module.